#alu

RISC-V

Nov 4, 2026

RV32I 2: Integer Ops, Compares, Shifts, and Building Constants with lui/auipc

Part 3 of the RISC-V series. Checks RV32I integer arithmetic, compares, shifts, and flagless overflow handling on QEMU with 15 edge cases, then examines the +1 correction for building 32-bit constants and addresses with lui and auipc through 1 million random trials.