Microprocessor Note
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Microprocessor NoteCrossbar Bus Architecture: From Shared Bus to Full Matrix
Notes on the crossbar bus that connects multiple masters and slaves. Covers the evolution from shared bus to hierarchical bus to full matrix, the PL301 structure and arbitration schemes, pipelined and burst transfers, QoS, scaling to NoC, and clock domain crossing.
Microprocessor NoteAMBA APB Protocol: Signals and Read/Write Transfer Timing
Notes on the AMBA 3 APB protocol. Covers the characteristics and signals of this bus for low-speed peripherals, read and write transfer timing with and without wait states, the APB slave state machine, the AHB-APB bridge, and a comparison of APB and AHB.
Microprocessor NoteDigital Adder Design: Half/Full Adders and Ripple Carry Adder Delay
Notes on digital adder architectures. Covers half and full adders with propagate and generate, transistor-level design, and ripple carry adder delay, through carry lookahead, carry skip and carry select, and Brent-Kung and Kogge-Stone adders.
Microprocessor NoteHow CMOS Transistors Work: From the PN Junction to nMOS/pMOS
Notes on CMOS fundamentals. Covers ICs and VLSI, silicon and the PN junction, nMOS and pMOS transistor operation and the switch model, the CMOS inverter and compound gates such as NAND and NOR, why CMOS saves power, and the process cross-section.
Microprocessor NoteDatapath Functional Units: Barrel Shifters, Comparators, Multipliers
Notes on the functional units of a processor datapath. Covers the structure and area/delay characteristics of barrel shifters, equality and magnitude comparators, array multipliers and Booth encoding, Wallace and Dadda trees, and restoring and non-restoring dividers.