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Clear filtersIntro to ARM Embedded Systems: ARM vs. Thumb Instruction Sets
Notes from an introduction to ARM embedded systems. Covers what an embedded system is and why ARM is used there, and compares the data sizes and characteristics of the 16-bit Thumb instructions introduced in ARMv4 with the 32-bit ARM instructions.
Inside the ARM Processor: The 3-Stage Pipeline and Instruction Execution
Notes on the organization and implementation of ARM processors. Covers the main components such as the register file, barrel shifter, and ALU, the 3-stage pipeline, the memory bottleneck, the evolution to the 5-stage ARM9, data forwarding, and multiple load/store.
Raspberry Pi Hardware: The Cache Hierarchy and ARM vs x86
Notes on Raspberry Pi hardware. Covers the BCM2711 SoC specs, L1 and L2 cache organization and associativity, ARM vs x86, Windows vs Linux, and Linux basics such as shell commands, file commands, pipes, and redirection.
Intro to Raspberry Pi Hardware Hacking: GPIO, UART, I2C, and SPI
Introductory notes on hardware hacking: driving external devices directly from a Raspberry Pi. Covers how the GPIO, UART, I2C, and SPI buses work and where they fall short, controlling an LED circuit with wiringPi, and hands-on manipulation of the BCM2835 peripheral registers.
Inside the ARM Cortex-M3: Harvard Architecture, Registers, and xPSR
Notes on the structure of the ARMv7-M-based Cortex-M3. Covers its specifications, modified Harvard memory architecture, 3-stage pipeline, general-purpose registers R0~R12, the APSR, IPSR, and EPSR flags in xPSR, and the PRIMASK, FAULTMASK, and BASEPRI special registers.
ARM Assembly Basics: Instruction Format and Arithmetic/Logic Operations
Notes on the basics of ARM assembly programming. Covers instruction format and suffixes, arithmetic, logical, shift, and comparison operations, immediate value rules, shifted register operands, setting condition codes, addressing modes, and branches and subroutines, with examples.
ARM Architecture and Registers: Banked Registers by Processor Mode
Notes on the programmer's model of the ARM architecture. Covers the version lineage, visible registers, banked registers by processor mode, the PC and CPSR, supervisor mode, the load-store architecture, and data processing and control flow instructions.
